Yuchen Tang

I'm a pursuing a M.S. degree in Computer Engineering, here at Stony Brook University. Prior to that, I spent 2 years working at Huawei as an Operating Engineer, researching into tiered memory systems.

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Experience

• Increased RDMA scalability and performance by optimizing OpenUCX, an RDMA communication middle-ware
• Enlarged memory nodes for Huawei's Taishan servers, using FPGA-based CXL 1.1 devices
• Optimized Huawei's tiered memory system manager, etmem, using PEBS sampling, together with other features

• Composed a Python script that parses text and updates the results to Apache Hive databases accordingly

Selected Projects

I'm interested in Operating Systems, Compute Express Link (CXL) and RDMA.

• Implement both packet transmission and reception logic from scratch, 900+ lines of kernel code
• Manipulate two ring buffers of hardware descriptors to ensure safe and complete DMA operations
• Support multi-fragment packet transmission and NAPI-based polling (under construction)
• 50% performance boost compared to last generation

• Helped implementing XRC service type, efficiently bringing down QP numbers thus increasing RDMA scalability.
• Helped resolving the Head-of-Line blocking problem with message slicing and finer credibility-based priority mechanism.
• Evaluated our implementation based on both micro-benchmarks and real world applications.

• Observed the frequent page ping-pong caused by original, coarse-grained access bit checking method.
• Developed a substitute kernel module that listens to fine-grained hardware access counter results.

• The company's tiered memory system, etmem, identifies cold and hot pages and migrates them between tiers of memory to best exploit fast memory for performance and slow memory for capacity.
• Replaced CPU consuming and time costly page table scanning with PEBS sampling.

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